EnglishJapanese
 
Supported Nodes
180nm
130nm
110nm
90nm
65nm
40/45nm
portable to ≤ 28nm
Partners

alchip

alchip Logo

alchip alchip

ARM

ARM Logo

ARM ARM

Chip Estimate

Chip Estimate Logo

Chip Estimate Chip Estimate

Constellations

Constellations Logo

Constellations Constellations

D and R

D and R Logo

D and R D and R

eSilicon

eSilicon Logo

eSilicon eSilicon

Faraday

Faraday Logo

Faraday Faraday

GSA

GSA Logo

GSA GSA

Mentor

Mentor Logo

Mentor Mentor

NSW

NSW Logo

NSW NSW

SAT

SAT Logo

SAT SAT

Toppan

Toppan Logo

Toppan Toppan
Supported Foundries

UMC

UMC Logo

UMC UMC

Tower

Tower Logo

Tower Tower

Fujitsu

Fujitsu

Fujitsu Fujitsu

SMIC

SMIC Logo

SMIC SMIC

TSMC

TSMC

TSMC TSMC
Intermediate/Senior Test Engineer
Locations:
    Ottawa, Ontario
Position Type:
    Full-Time, Employee
Education:
    Bachelors or Masters degree in Electrical Engineering (preferred), Computer Engineering or Computer Science
Required Skills & Experience:

Minimum 5 years hands-on experience in product/test engineering. Experience in evaluating and characterizing semiconductor memory, creating test plans and programs, analyzing test data and presenting results, and writing test reports. Experience in memory ATE programming (ex. Credence Kalos) and tester operation. Experience with programming languages (C, Java, Perl).

Responsibilities:

The Test Engineer will develop and debug test programs for Sidense Logic NVM (OTP) memories. He/she will work with design and verification engineers to resolve functional/reliability issues, and will be responsible for all aspects of evaluation, characterization and reliability testing.
Home   | Site Map