| Senior Memory Design Engineer |
Education:
Theoretical and practical knowledge in the field of electronics concept design, transistor level circuit design, memory chip architectures, schematic capture/layout editor tools, and computer chip layout design.
Required Experience:
Minimum 8-10 years of experience in the field of memory design. Strong technical leadership skills: direction setting, technically heading a team of experts, training of experienced designers. Expert knowledge regarding transistor level design. Good knowledge regarding CMOS technology, physical design, memory architectures and the interactions of the various functional blocks. Team player. Excellent communication skills. Highly motivated. Technical leadership skills.
Responsibilities:
The Design Engineer will perform circuit design for highly integrated memory devices, define and and implement memory architectures. Create concepts of CMOS circuits fulfilling specific requirements. Will perform circuit optimization and verification by simulations using HSPICE like simulation tools as well as event driven simulators. Supervise layout development for the circuits. Support design characterization and analysis upon availability of hardware. Contribute towards advancement of the design methodology. Provide technical leadership across the organization.
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