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Page 1 of 5 The NVM Insider
A quarterly look at embedded NVM/OTP happenings
# 5 – September 2009
Executive Opinion: The Promise of NVM
Xerxes Wania, President & CEO, Sidense Corp.
If you are a chip designer looking to embed non-volatile memory on your design, there are plenty of technologies from which to choose, both one-time programmable (OTP) and multiple-time programmable (MTP). The decision of which one(s) to choose for your chip depends on many technology and business parameters, including speed, density, power, cost, scalability to new processes and portability to different foundries, just to name a few. With these constraints in mind, many of you have already seen some of the problems in using traditional embedded non-volatile memories – mask ROM, eFuse and Flash.
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Outside Thoughts: Optimization Has Its Place ... But So Does Exploration
Adam Traidman, General Manager of Chip Planning Solutions, Cadence Design Systems
Traditional EDA flows, from synthesis through the backend, focus solidly on design optimization. From performance to timing, from power to area and, with the advent of the Design for Manufacturing paradigm, on through to yield, the mainstream EDA workhorse tools that have emerged over the past decade serve to optimize any given design to within nanometers of its life. The central idea behind the optimization-driven design methodology is to converge upon the most advantageous values for a specific metric or group of variables in order to achieve a set of pre-determined design goals.
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Sidense Out and About
Sidense Authored Articles
Editorial Coverage
Upcoming Conferences/Tradeshows of Interest
- GSA Expo
Santa Clara, CA (October 1)
Come by the Sidense booth (#301) to talk to us about our industry-leading OTP IP or arrange a meeting by contacting Jim Lipman (925-606-1370,
This e-mail address is being protected from spam bots, you need JavaScript enabled to view it
).
NVM on the Mind
Recent Articles
- Hot papers at 2009 VLSI Technology Symposium, Don Scansen
I always enjoy looking through the advance programs of the Big Three chip conferences--IEDM, ISSCC and VLSI. This year is no exception. Here are my top five tech papers from the Technology Symposium, a pillar of the upcoming VLSI Symposia. (June 11, 2009)
- Little-known flash-memory features protect data and IP, Bill Stafford
You design a system, and somebody messes it up. The damage is sometimes unintentional. For example, a service provider may install its software on your device and corrupt your original code. On the other hand, hackers and IP (intellectual-property) thieves go out of their way to overwrite, copy, or clone data stored in your systems.
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