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Sidense Hires Industry Veteran Ken Wagner as Senior VP Engineering

Ottawa, Canada – (January 21, 2016) - Sidense Corp., a leading developer of Non-Volatile Memory (NVM) One Time Programmable (OTP) IP cores, today announced that Ken Wagner has joined Sidense as the Company’s Senior Vice President of Engineering. Ken will be reporting to Sidense President and CEO Xerxes Wania and will assume responsibility for all of Sidense's engineering activities.

Read more: Sidense Hires Industry Veteran Ken Wagner as Senior VP Engineering

Sidense Qualifies 1T-OTP Memory IP at GLOBALFOUNDRIES 55nm Low-Power Process Node

Sidense NVM available on several GLOBALFOUNDRIES' processes from 28nm to 180nm for IoT and other key applications

Ottawa, Canada – (December 29, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it has fully qualified its SiPROM one-time programmable (OTP) non-volatile memory (NVM) embedded memory products on GLOBALFOUNDRIES' production-proven 55-nanometer (nm) Low-Power Enhanced (LPe) process technology platform.

Read more: Sidense Qualifies 1T-OTP Memory IP at GLOBALFOUNDRIES 55nm Low-Power Process Node

Sidense Qualifies 1T-OTP Memory IP at SMIC 130nm and 110nm Processes

Sidense now supports several popular SMIC processes from 40nm to 130nm for IoT and other key market segments

Ottawa, Canada – (December 3, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it has fully qualified its SiPROM one-time programmable (OTP) non-volatile memory (NVM) embedded memory products at SMIC's (Semiconductor Manufacturing International Corporation) 130nm and 110nm G processes. This expands Sidense's coverage of SMIC processes from 40nm to 130nm. Other 1T-OTP memory macros are under development for additional SMIC processes to address customer requirements for device development targeting applications in the Smart Connected Universe.

Read more: Sidense Qualifies 1T-OTP Memory IP at SMIC 130nm and 110nm Processes

Sidense an Inaugural Member of the Core Store

Sidense 1T-OTP products now listed on the Core Store website

Ottawa, Canada – (November 17, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it is an inaugural member of the Core Store, a new semiconductor intellectual property portal. Sidense's 1T-OTP non-volatile memory (NVM) products, covering a broad range of silicon foundries, process nodes and variants, are listed on the site, along with key attributes of each.

Read more: Sidense an Inaugural Member of the Core Store

Sidense Announces New Chief Financial Officer

Ottawa, Canada – (May 15, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced Bob Daly as the company's Chief Financial Officer. In that role, Mr. Daly will oversee Sidense's financial planning and reporting as the company continues its rapid expansion.

Read more: Sidense Announces New Chief Financial Officer

Sidense Increases its Coverage of the Popular 28nm Node

1T-OTP macros, targeting the Smart Connected Universe, meet all of GLOBALFOUNDRIES' qualifications for 28nm-HPP and 28nm-SLP Processes

Ottawa, Canada – (March 26, 2015) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that the Company's SHF 1T-OTP macros for GLOBALFOUNDRIES 28nm HPP and SLP processes have met all of GLOBALFOUNDRIES qualification requirements. Applications for Sidense SHF memory IP include code storage, ROM replacement, secure encryption key storage, configuration, fuse replacement, trimming and calibration in networking, mobile computing and communications, IoT, automotive and industrial applications.

Read more: Sidense Increases its Coverage of the Popular 28nm Node

Judge Orders Kilopass to Pay Sidense $ 5.5 Million in Legal Fees and Costs for Baseless Patent Infringement Lawsuit

Ottawa, Canada – (March 16, 2015) - Sidense Corp., a leading developer of nonvolatile memory OTP IP cores, today announced that U.S. District Judge Susan Illston has ordered Kilopass Technology to pay Sidense $5.5 million for its "objectively baseless" patent infringement lawsuit initiated against Sidense in May of 2010. The fee recovery represents attorneys' fees and associated costs.

Read more: Judge Orders Kilopass to Pay Sidense $ 5.5 Million in Legal Fees and Costs for Baseless Patent...

Sidense Announces New Executive Appointments

Ottawa, Canada – (November 11, 2014) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced Jim Roche as the company's new Chief Operating Officer. In that role, Mr. Roche will be responsible for driving strategic planning and taking corporate growth to the next level.

Read more: Sidense Announces New Executive Appointments

Sidense Demonstrates Working One-Time Programmable (OTP) Bit Cells in TSMC 16nm FinFET Technology

Test chips show successful read and program capability with excellent programmed cell characteristics for 1T-Fuse™ cells implemented in FinFET architecture

Ottawa, Canada – (September 4, 2014) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that it successfully demonstrated read and write capability for its 1T-OTP bit-cell architecture on test silicon fabricated in a 16nm CMOS FinFET process. 

Read more: Sidense Demonstrates Working One-Time Programmable (OTP) Bit Cells in TSMC 16nm FinFET Technology

Sidense SHF Embedded Memory Macros Target High-Performance and Low-Power Applications in TSMC 28nm Processes

1T-OTP macros, ideal for mobile computing and communications applications, meet all TSMC9000 Quality Management Program requirements for 28HPL, 28HPM and 28HPC Processes

Ottawa, Canada – (May 29, 2014) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that the Company’s 1T-OTP macros for TSMC’s 28nm HPL, HPM and HPC processes have met all TSMC9000 Quality Management Program requirements. Applications for Sidense SHF memory IP include code storage, ROM replacement, secure encryption key storage, configuration, fuse replacement, trimming and calibration. 

Read more: Sidense SHF Embedded Memory Macros Target High-Performance and Low-Power Applications in TSMC 28nm...

Sidense 1T-OTP NVM Qualified in Second-Generation TSMC 180nm BCD Process

1T-OTP meets all TSMC9000 requirements for TSMC’s 180nm BCD Gen 2 process

OTP macros fully qualified for -40ºC to 150°C read and field-programmable operations

Ottawa, Canada – (April 30, 2014) - Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that the Company's 1T-OTP macros for TSMC's 180nm BCD 1.8/5.0V Gen 2 process have met all TSMC9000 Assessment program requirements. Sidense OTP macros, at this process node, support applications such as automotive and industrial electronics that require reliable operation and long-life data retention in high-temperature environments. Customers are using Sidense Automotive Grade OTP in a wide range of devices, including power-management ICs, sensors and microcontrollers for applications in automotive, industrial, mobile and consumer devices and systems.

Read more: Sidense 1T-OTP NVM Qualified in Second-Generation TSMC 180nm BCD Process

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