Sidense completes filing of all three Kilopass memory cell patents asserted against the Company
Ottawa, Canada – November 29, 2010 - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, announced today that it has requested the United States Patent and Trademark Office (USPTO) to reexamine Kilopass U.S. Patent Nos. 6,950,751 entitled "High density semiconductor memory cell and memory array using a single transistor and having variable gate oxide breakdown," and rule that the claims of this patent are invalid.
"Sidense has asked the USPTO to re-examine this third Kilopass patent, similar to the requests we made last month against two other Kilopass patents, Nos. 6,777,757 and 6,856,540, each entitled "High Density Semiconductor Memory Cell and Memory Array using a Single Transistor," said Xerxes Wania, Sidense President and CEO. "As was the case for the '757 and '540 patents, we learned that when the USPTO granted the '751 patent, it did not consider key prior art. Hence we have asked the USPTO to re-examine the '751 patent and find it invalid over this prior art."
"Despite having asserted in May that Sidense's one-time programmable memory array technology infringes Kilopass' patents, Kilopass has yet to try to explain their infringement theory," stated Sidense's attorney, Roger Cook of Townsend, Townsend and Crew LLP, "and now all three of their patents are headed for reexamination."
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense OTP memory, embedded in over 120 customer designs, is available from 180nm down to 40nm and is scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
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