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Sidense 1T-OTP Memory Macros meet JEDEC Accelerated Testing Qualifications at Two TSMC 28nm Process Nodes

SHF Memory IP targets advanced process node designs

Ottawa, Canada – December 26, 2013 – Sidense Corp., a leading developer of non-volatile memory OTP IP cores, today announced that its SHF Non-Volatile Memory (NVM) macros have met stringent JEDEC accelerated testing requirements for TSMC's 28HPM and 28HPL process nodes.

The 28nm HPM node addresses applications requiring high speed as well as low-leakage power and is suitable for many applications from networking and tablets to mobile consumer products. The 28nm HPL low-power node is best suited for cellular baseband, application processor, wireless connectivity, and programmable logic applications.

Read more: Sidense 1T-OTP Memory Macros meet JEDEC Accelerated Testing Qualifications at Two TSMC 28nm...

Sidense Enjoys Record Fiscal Year 2013

Revenues doubled over Fiscal Year 2012

Ottawa, Canada – November 26, 2013 – Sidense Corp.,a leading developer of non-volatile memory OTP IP cores, today announced that its fiscal year 2013, which ended September 30, 2013 (FY2013), was its best year yet for revenue. In addition, the fourth quarter of FY2013 established a new quarterly revenue record for Sidense.

Read more: Sidense Enjoys Record Fiscal Year 2013

Sidense OTP Helps Novatek Provide Customers with Cost-Effective and Reliable Display Drivers

Sidense 1T-OTP macros chosen by Novatek for use in mobile display driver ICs

Ottawa, Canada – November 12, 2013 – Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced that Novatek Microelectronics Corp. has selected Sidense's 1T-Fuse™-based 1T-OTP memory IP for its display driver ICs for flat-panel displays. Novatek's decision to use Sidense's high-voltage SLP NVM macros was based on several compelling features, including very low power consumption, high reliability and small OTP macro footprint.

Read more: Sidense OTP Helps Novatek Provide Customers with Cost-Effective and Reliable Display Drivers

Sidense Advanced Process Node 1T-OTP to be used in Sigma Designs DTV Products

SHF non-volatile memory macros selected for 40nm product implementation

Ottawa, Canada – October 29, 2013- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced that Sigma Designs®, a leading provider of System-on-Chip (SoC) solutions for converging multimedia delivery of home entertainment, home control, and connectivity, has selected Sidense 1T-Fuse™-based 1T-OTP memory IP for use in their next generation DTV and home entertainment product lines.

Read more: Sidense Advanced Process Node 1T-OTP to be used in Sigma Designs DTV Products

Sidense OTP Preferred by MV Silicon for their Audio Device ICs

  • Sidense 1T-OTP macros used for customer program storage in MP3 players and other audio equipment

Ottawa, Canada – September 9, 2013- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced that Mountain View Silicon Technology (MV Silicon), a supplier of ICs used in a broad range of audio applications, has chosen Sidense 1T-Fuse™-based 1T-OTP memory IP for use in its ICs for processing, conversion and amplification in audio devices. 

Read more: Sidense OTP Preferred by MV Silicon for their Audio Device ICs

Sidense OTP Helps Richtek Technology Give Customers Cost-Effective and Efficient Power Management Solutions

Sidense 1T-OTP chosen by Richtek for its Small Size, Low Cost and High Reliability

Ottawa, Canada – Aug 29, 2013- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced that Richtek Technology has selected Sidense 1T-Fuse™-based 1T-OTP memory IP for its Power Management IC (PMIC) products. The decision to use Sidense SLP NVM macros was based on several 1T-OTP features that help give Richtek a competitive edge over other PMIC providers.

Read more: Sidense OTP Helps Richtek Technology Give Customers Cost-Effective and Efficient Power Management...

Sidense Announces SHF 1T-OTP Non-Volatile Memory IP for Advanced Process Chip Designs

  • SHF 1T-OTP targeted for SoCs implemented in 40nm, 28nm, 20nm and smaller geometries.
  • Sidense 1T-OTP used in a wide range of leading semiconductor manufacturers' 40nm and 28nm designs

Ottawa, Canada – July 31, 2013- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced its SHF (Sidense Hiper Fuse) one-time programmable (OTP) memory for ICs developed in advanced processes at 40nm, 28nm, 20nm and smaller geometries. Sidense SHF 1T-OTP has already been qualified in 40nm processes in both G and LP variants, and is completing qualification in multiple 28nm processes with 20nm qualification to follow.

Read more: Sidense Announces SHF 1T-OTP Non-Volatile Memory IP for Advanced Process Chip Designs

Sidense Wins: United States Court of Appeals for the Federal Circuit Affirms District Court Decisions

  • In its one-word opinion, the Federal Circuit “AFFIRMED” Sidense’s summary judgment of non-infringement on Kilopass’ patent claims, as well as the dismissal of all of Kilopass’ remaining claims against Sidense.

Ottawa, Canada - (April 11, 2013) - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, announced today that a panel of judges in the United States Court of Appeals for the Federal Circuit "Affirmed" the District Court for the Northern District of California's summary judgment of non-infringement on Kilopass' patent claims and its dismissal, with prejudice, of all remaining claims against Sidense. This represents a clear and unequivocal win for Sidense. Twice now, in summary judgment, and now on appeal, United States courts have agreed with Sidense that Kilopass' lawsuit against it was entirely without merit.

Read more: Sidense Wins: United States Court of Appeals for the Federal Circuit Affirms District Court...

Sidense 1T-OTP NVM Qualified for 150°C Automotive High-Reliability Requirements on TSMC's BCD Process

  • 1T-OTP fully qualified for automotive temperature range, supporting AEC-Q100 Grade 0 applications on TSMC 180nm BCD process.
  • Chosen by a number of leading semiconductor companies, enabling cost-effective NVM for high-reliability devices.

Ottawa, Canada - (April 1, 2013) - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores, announced today that the Company's 1T-OTP macros for TSMC's 180nm BCD 1.8/5V/HV and G 1.8/5V processes have met all of TSMC's IP9000 Assessment program requirements. Sidense OTP macros are fully qualified for -40ºC to 150°C read and field-programmable operations to support applications such as automotive electronics that require reliable operation and long-life data retention in high-temperature environments.

Read more: Sidense 1T-OTP NVM Qualified for 150°C Automotive High-Reliability Requirements on TSMC's BCD...

Sidense Qualifies 1T-OTP Non-Volatile Memory for MagnaChip 180nm Mixed-Signal and HV CMOS Process

  • 1T-OTP available in high-voltage CMOS process for a wide range of applications including LED lighting, power management and display controllers

Ottawa, Canada, Seoul, South Korea and Cupertino, Calif. – (March 25, 2013)- MagnaChip Semiconductor Corporation("MagnaChip") (NYSE: MX),a Korea-based designer and manufacturer of analog and mixed-signal semiconductor products, and Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) one-time programmable (OTP) memory IP cores today announced that Sidense's SLP 1T-OTP macros have been fully qualified for MagnaChip's 180nm 1.8/3.3/18V high-voltage CMOS and mixed-signal process. Semiconductor devices fabricated in these processes are used in applications such as LED lighting controllers, display controllers and power-management ICs (PMICs) for mobile and other high-volume applications.

Read more: Sidense Qualifies 1T-OTP Non-Volatile Memory for MagnaChip 180nm Mixed-Signal and HV CMOS Process

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