- SHF 1T-OTP targeted for SoCs implemented in 40nm, 28nm, 20nm and smaller geometries.
- Sidense 1T-OTP used in a wide range of leading semiconductor manufacturers' 40nm and 28nm designs
Ottawa, Canada – July 31, 2013- Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, today announced its SHF (Sidense Hiper Fuse) one-time programmable (OTP) memory for ICs developed in advanced processes at 40nm, 28nm, 20nm and smaller geometries. Sidense SHF 1T-OTP has already been qualified in 40nm processes in both G and LP variants, and is completing qualification in multiple 28nm processes with 20nm qualification to follow.
Customers who have licensed SHF for 40nm and 28nm processes include some of the leading semiconductor companies developing products for mobile, consumer and computing applications.SHF uses include code storage, field-programmable ROM replacement, secure encryption key storage, configuration, fuse replacement, trimming and calibration.
SHF brings the advantages of Sidense's widely adopted 1T-OTP memory to customers developing silicon products in 40nm and more advanced process technologies. In addition to providing small footprints, SHF macros do not require any additional masks or process steps to implement in polysilicon or HKMG advanced processes (gate first and gate last), providing a very cost-effective embedded memory solution. Sidense's patented one-transistor bit cell also provides many advantages in security and reliability when compared to other types of non-volatile memory.
Sidense SHF provides further customer benefits including fast programming and fast read performance for executing code in-place, read and write operation over -40°C to 125°C, and a comprehensive feature set providing built-in redundancy, programming and test interfaces,error correction, program control, self-test and support for high-security applications. A range of power supply options are also available for in-field programming, supporting both high-performance computing and mobile, power-sensitive applications.
"As with all our NVM products, SHF macros are based on our patented split-channel 1T-Fuse™ bit cell architecture, which enables Sidense to provide secure, reliable and cost-effective field-programmable OTP products for wide range of applications," said Wlodek Kurjanowicz, Sidense's Founder and Chief Technology Officer. "SHF was developed for our leading-edge customers designing low-voltage and high-performance products requiring a complete NVM solution in the most advanced process geometries."
About Sidense Corp.
Sidense Corp. provides very dense, highly reliable and secure non-volatile one-time programmable (OTP) Logic Non-Volatile Memory (LNVM) IP for use in standard-logic CMOS processes. The Company, with over 115 patents granted or pending, licenses OTP memory IP based on its innovative 1T-Fuse™bit cell, which is silicon proven down to 20nm geometries and does not require extra masks or process steps to manufacture. Sidense 1T-OTP macros provide a better field-programmable, reliable and cost-effective solution than flash, mask ROM, eFuse and other embedded and off-chip NVM technologies for many code storage, encryption key, analog trimming and device configuration uses.
Over 100 companies, including many of the top fabless semiconductor manufacturers and IDMs, have adopted Sidense 1T-OTP as their NVM solution for more than 300 designs. Customers are realizing outstanding savings in solution cost and power consumption along with better security and reliability for applications ranging from mobile and consumer devices to high-temperature, high-reliability automotive and industrial electronics. The IP is offered at and supported by all top-tier semiconductor foundries and selected IDMs. Sidense is headquartered in Ottawa, Canada with sales offices worldwide. For more information, please visit www.sidense.com.
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