Engineer, IC Verification

The Opportunity

Sidense provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.

Sidense OTP memory, embedded in over 100 customer designs, is available from 180nm down to 40nm and is scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic.

Sidense is headquartered in Ottawa, Ontario and services an expanding worldwide customer base.


As the Engineer, IC Verification you will be responsible for verifying company products. Working with other experts in this field, you will apply specialized functional knowledge and be responsible for the product verification process from specification through to implementation and validation. Some of the key outcomes for this role include:

  • Perform functional verification of Sidense Memory IP, RTL modules and functional Verilog models
  • Perform simulations at the gate and block levels, performance analysis and verify functionality of assigned IPs with the goal of first silicon functionality
  • Participate in the development of verification test plans using product specifications and provide measures of coverage to ensure verification completeness
  • Participate in the development of test cases and testbenches as assigned
  • Responsible for detailed debugging, performing root cause failure analysis on functional RTL, gate level netlists, and/or verification components
  • Design, improvement and maintenance of digital and mixed signal verification environments
  • Work in strict contact with modeling-engineers and designers to insure consistency and convergence (design / modeling / verification).


Required Qualifications

  • Bachelor or Masters in Electrical or Computer Engineering with 5+ years of experience
  • Knowledge and prior experience with industry standard simulation tools including digital and mixed mode simulators
  • Strong analytical, debugging and problem solving skills with the ability to look beyond the obvious
  • Proficient in Verilog/SystemVerilog and scripting languages (Shell, Make, TCL, Perl) is required
  • Working knowledge of Linux/Unix platform
  • A good team player with excellent communication skills, both written and oral
  • Able to write behavioural models to address verification needs
  • Knowledge of RTL and the synthesis flow including place and route desirable
  • Exposure to UVM or other advanced verification methodologies desirable
  • Knowledge of schematic capture, transistor level design and spice simulations an asset.


Why work for us?

Sidense is an innovative company dedicated to becoming the leader in memory IP. This is why skilled, creative and dynamic professionals to join our team. At Sidense, you have the opportunity to work alongside technology thought leaders while directly contributing to the delivery of our world-class OTP IP.

To join the Sidense team:

Email your cover letter and resume in confidence to This email address is being protected from spambots. You need JavaScript enabled to view it., specifying the title of the position you are applying for in the subject line of your message. Please be sure to provide some insight into your initiative, skills and achievements, and how you plan to contribute toward the growth of our company.

Accommodation for applicants with disabilities is available upon request.

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