2011

Jim Lipman interview with Sean O'Kane ChipEstimate.TV at TSMC OIP Forum

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Featured Tech Talk: Using Antifuse 1T-OTP for Analog Trimming and Calibration

Tech Talk featured by ChipEstimate.com.  Written by Craig Downing and Jim Lipman, Sidense

Abstract -   

Analog ICs, sensors and mixed-signal SoCs that include analog circuitry, such as Power Management ICs (PMICs), need to meet precise specifications for analog signal behavior. Variations in chip processing and effects of the packaging process result in unpredictable deviations of analog circuits and sensors from their target specifications. To compensate for these deviations, analog circuitry needs to be trimmed or calibrated by adjusting part of the circuitry, for example, resistance values that vary the behavior of an analog-to-digital converter. In addition, as IC developers continue to strive for reduced power consumption and cost by moving to smaller geometries, the problem of optimizing the analog circuitry becomes more important as process variations tend to have a larger effect on analog circuit behavior.

Read the complete story....

eMTP Featured Tech Talk March 29, 2011

Article "Using Cost-Effective and Secure Field-Programmable 1T-OTP to Emulate MTP" by Jim Lipman and Craig Downing, Sidense

Abstract -   Applications for non-volatile memory (NVM) encompass a wide range of programming requirements. Some products require one-time programmable (OTP) memory that is programmed during chip fabrication – mask ROM is good for this purpose if the code is frozen. Other products need field-programmable OTP for applications such as analog trimming, necessitating the use of secure in-system programmable NVM.

To view the entire article see the attached PDF 1T OTP for eMTP Applications.

Using 1T-OTP in FPGAs

Article "Using 1T-OTP in FPGAs and other Reconfigurable Logic" by Eddy Huang and Jim Lipman, Sidense

Abstract -   Introduction
Driven by the demands of the consumer electronics marketplace – low price points and constantly shrinking design cycles – programmable logic and reconfigurable silicon solutions are rapidly gaining acceptance by chip designers for a wide range of product development. Being able to accelerate code development on a completed hardware platform and to reconfigure logic on a chip to handle different computational requirements are just two of the reasons designers are using reconfigurable hardware in their products.

To view the entire article see the attached PDF OTP in FPGAs.

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