The NVM Insider, Issue 1 - Page 4 - Sidense Out and About

Sidense Out and About

• Sidense was issued U.S. Patent #7,402,855 for their Split Channel Antifuse Array Architecture, the basis of Sidense’s 1T-Fuse™ one-time programmable (OTP) memory cell (July 22)
• Press Releases
  • Magnum Semiconductor Licenses Sidense's Logic Non-Volatile Memory
  • Sidense SLP Memory IP Targets Low Power OTP Applications
  • Sidense Board of Directors Welcomes Two Industry Veterans
• Articles
  • Designing Low-Power Field-Programmable OTP Memory Arrays (IP Connections Tech Talk, June 17, 2008)
    http://www.chipestimate.com/techtalk/techtalk_080617.html
  • Antifuse Memory IP Fuels Low-power Designs (EE Times, August 1, 2008)
    http://www.eetimes.com/news/design/showArticle.jhtml?articleID=209900470
• Upcoming Conferences/Tradeshows of Interest
  • CDNLive!, September 9-11, 2008 at the San Jose Marriott and San Jose Convention Center in San Jose, CA. (Sidense Booth #20 on September 10)
    http://www.cadenceevents.com/cdnlive/na/controller.cfm?view=registration.overview&UNKNOWNTYPE=EEGNUM
  • GSA IP Conference, September 24-25, 2008 at the Santa Clara Convention Center in Santa Clara, CA.
    http://www.gsaglobal.org/events/2008/0924/
  • GSA Suppliers Expo and Conference, October 2, 2008 at the Santa Clara Convention Center in Santa Clara, CA. (Sidense Booth #219)
    http://www.gsaglobal.org/suppliers_expo/usa2008/
  • IP 08, December 3-4, 2008 at the Hotel Novotel in Grenoble, France (Sidense on Easy Third-Party IP Integration – Fact or Fiction? panel)
    http://www.design-reuse.com/ip08/

Your Two Bits!

From the below list, what is the most important attribute that you would like to see in embedded OTP that you use or would consider using? Select your choice on our online poll (along the left, below the main menu).  Final results will be posted in the next The NVM Insider.

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