|The NVM Insider, Issue 3|
|Page 2 - Executive Opinion|
|Page 3 - Outside Thoughts|
|Page 4 - NVM on the Mind|
In this economic climate it is difficult to manage new design projects as priorities are adjusted and schedules changed. But it is also true if new design efforts were halted today, the negative impact to the future revenue of a semiconductor company would be devastating. Design managers are facing tough decisions, including prioritization, execution, and first-time design effectiveness with their current design team. These decisions relate directly to picking an IP partner who can not only cover current design project needs, but also the needs that future products will require.
The traditional SoC has long viewed the agility of its FPGA neighbor with envy, even as the FPGA has sought the low unit cost of an SoC. As they say, the grass is always greener on the other side. While structured ASICs have labored to keep one foot in the hardwired and programmable ponds, respectively, these vendors have primarily succeeded in adding an unacceptable delay in the path from flexibility during prototyping to low cost in volume production. New Platform Oriented Architecture (POA) based SoC devices are now enjoying the greater flexibility long associated with FPGA devices while maintaining their low unit costs.
Which foundry are you likely to use for your next design? Which process node are you considering? Select your choice on our online poll. Final results will be posted in the next The NVM Insider.