Index
The NVM Insider, Issue 9
Page 2 - Executive Opinion
Page 3 - Outside Thoughts
Page 4 - Tech Tidbits
Page 5 - Sidense Out and About
All Pages

September 2010

A quarterly look at embedded NVM/OTP happenings


Xerxes Wania, President and CEO, Sidense

Executive Opinion: OTP Business Continues to be Good for Sidense

Xerxes Wania, President and CEO, Sidense

As the fiscal year winds down for Sidense, I thought you would like a brief summary of how the year has gone for us. The answer - quite well.

We are forecasting FY2010 to be the best ever for Sidense, with more than 50% higher revenue compared to FY2009. Along with several repeat customer deals, we continue to attract many new customers and now have shipped more than 100 of our secure, reliable and cost-effective OTP macros to more than 60 customers worldwide.

Read more

 

Mike Kaskowitz,  Managing Director, Infinitedge

Outside Thoughts: The Perfect Storm

By Mike Kaskowitz, Managing Director, Infinitedge

As we begin to emerge from the worst global recession in most of our lifetimes, it reminds me of having survived a storm of epic proportions. Fortunately, there are some global market drivers that are creating an outstanding opportunity for IP companies and a new "Perfect Storm" is emerging.

Read more

 

Tech Tidbits

Tech Tidbits: Emulated MTP Operation using Sidense OTP Macros

Craig Downing, Product Marketing Manager and Jim Lipman, Director of Marketing, Sidense

Many multi-time programmable (MTP) applications that currently use traditional embedded NVM can benefit from using Sidense OTP in an emulated MTP (eMTP) mode in place of more traditional Flash memory or EEPROM. These applications are those that need reprogramming just a few times (sometimes referred to as Few Times Programmable, or FTP) over the lifetime of the product, such as for HDCP encryption keys, firmware, or product IDs that track product update information.

Read more

 

 

Sidense Out and About

Press Releases

Sidense Patents

Sidense was granted two patents in July by the United States Patent and Trademark Office (USPTO):

  • Patent #7,755,162 for an "Anti-Fuse Memory Cell"
  • Patent #7,764,532 for a "High Speed OTP Sensing Scheme"

Visit Sidense at the Upcoming Conferences and Tradeshows


  • GSA Emerging Opportunities Expo and Conference, Booth #602
    Santa Clara, CA (Sept. 16, 2010).
    To schedule a meeting with Sidense at the GSA Expo, please contact Jim Lipman at This e-mail address is being protected from spambots. You need JavaScript enabled to view it , 925-606-1370
  • SMIC Symposium, Booth TBD
    Santa Clara, CA (Oct. 8, 2010).

  • GLOBALFOUNDRIES Technology Conference (GTC), Booth TBD
    Taipei, Hsinchu (Oct. 13, 2010).
    To schedule a meeting with Sidense at GTC, please contact Morse Wang at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

  • ARM European Technology Conference (AETC), Booth TBD
    Paris, France (Oct. 21, 2010).
    To schedule a meeting with Sidense at AETC, please contact Wim van Seters at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

  • Embedded Technology 2010 (ET 2010)
    Pacifico Yokohama, Japan (Dec. 1-3, 2010).
    Sidense will be in the Constellations Booth. To schedule a meeting with Sidense at ET2010, please contact Kazuaki Okawa at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

NVM on the Mind

Other Conferences of Interest


Find our IP catalog on ChipEstimate.com.

 


Xerxes Wania, President and CEO, Sidense

Executive Opinion: OTP Business Continues to be Good for Sidense

Xerxes Wania, President and CEO, Sidense

As the fiscal year winds down for Sidense, I thought you would like a brief summary of how the year has gone for us. The answer - quite well.

We are forecasting FY2010 to be the best ever for Sidense, with more than 50% higher revenue compared to FY2009. Along with several repeat customer deals, we continue to attract many new customers and now have shipped more than 100 of our secure, reliable and cost-effective OTP macros to more than 60 customers worldwide.

To handle the increasing volume of business and to continue the highest level of support for our existing and future customers, Sidense continues to recruit and hire well-qualified people. In the past six months, we have added more people to the Sidense team in several key areas, including support, engineering, marketing and finance.

Sidense is also making great strides on the advanced technology front, adding to our reputation as an OTP technology leader. We continue to migrate our designs to 40nm and 28nm with Tier 1 foundries TSMC, UMC and GlobalFoundries.

On August 20th, we announced that the U.S. Patent and Trademark Office granted Sidense Patent Number 7,755,162, "Anti-fuse Memory Cell." August also saw another USPTO patent granted, Number 7,764,532, for "High Speed OTP Sensing Scheme." These two new patents add to our fast-growing patent portfolio covering Sidense's 1T-FuseTM memory technology. We currently have over 70 patents granted or pending worldwide on our Split-Channel anti-fuse array architecture, anti-fuse memory cell, high-speed OTP sensing scheme, and other components and methodologies that go into Sidense's OTP macrocells.

Many of you have heard about the patent infringement lawsuit against Sidense by Kilopass. While the case makes its way through the courts, let me repeat what Sidense has said in public documents; we believe that any allegations that Sidense infringes Kilopass patents to be without substance or merit. We are confident that, in the end, our patents will be upheld, the Kilopass complaint dismissed, and that this result will strengthen our position and products. In the meantime, it's "business as usual" for us, which means working with our customers to supply them with the best OTP IP and helping them to develop successful products.

If you are interested in getting more information about the ongoing legal proceedings, please click here to visit the Sidense website secure legal section; you will have to register to gain entry.

For more information about Sidense OTP products, please contact Sidense at This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

 


Mike Kaskowitz,  Managing Director, Infinitedge

Outside Thoughts: The Perfect Storm

By Mike Kaskowitz, Managing Director, Infinitedge

As we begin to emerge from the worst global recession in most of our lifetimes, it reminds me of having survived a storm of epic proportions. Fortunately, there are some global market drivers that are creating an outstanding opportunity for IP companies and a new "Perfect Storm" is emerging.

During the past few quarters, we have seen a rebound in the NASDAQ, which is currently outperforming the general stock indices. ISuppli is forecasting semiconductor revenue to increase 35% from 2009 to a level of $310.3B, and through this rebound the entire composition of our industry has been undergoing dramatic changes.

Over the past few years, in an attempt to improve revenue growth and profits, the traditional large semiconductor companies have been divesting portions of their business so that they can focus on more vertically integrated solutions in higher growth markets. This, in turn, has created a large pool of highly talented engineers with specific domain knowledge, resulting in tremendous growth in the number of third-party IP companies. The challenge now, is to find creative ways to reintegrate these IP suppliers back into the ecosystem by aligning with the "hot market trends."

This is where the "Perfect Storm" comes to play. A number of concurrent factors have resulted in the creation of this storm. As described earlier, at this time we have the semiconductor manufacturers dumping design teams and acquiring more IP from outside sources. There are two key market trends that are the driving force behind this storm and the need for this IP - the convergence of consumer multimedia and the demands that portability and "internet everywhere" has placed on the communications infrastructure.

Devices such as the iPhone have enabled a concept of enriched media anywhere and anytime. This ubiquitous mobility has placed increased demand for streaming HD digital content, as well as person-to-person and machine-to-machine interfacing. This, in turn, has placed extreme demands on the communications infrastructure. The sum of all forms of video (TV, video on demand, Internet, and P2P) will account for over 91 percent of global consumer traffic by 2013, when it is estimated that Internet video will require nearly 700 times the U.S. Internet backbone that was required in 2000. We are at an inflection point where mobile broadband subscribers will exceed wireline subscribers and Mobile devices are taking over from the PC as the most common web-browsing tools.

To capitalize on these opportunities, third-party IP providers need to assess the technologies that help to address these market forces and align themselves properly with these ecosystems. Rather than focus on being providers to the semiconductor companies, today's IP companies need to focus on the system providers and OEMs, who have lots of cash available and would rather spend it than suffer with the current very low interest rates. In the past six months, we have seen more money spent on IP acquisitions than we have in the history of semiconductor IP.

Those IP vendors that are capable of properly aligning themselves have seen valuations and exits that have not been seen before in the semiconductor industry. To a large extent, we are now in a "Perfect Storm" and IP is the "Next Wave."

Mike Kaskowitz has over 30 years of technology and senior management experience in the embedded software and semiconductor intellectual property (IP) industries. With Infinitedge, Mr. Kaskowitz is primarily responsible for Strategic Advisory and Business Development. Previously, Mr. Kaskowitz was the Senior VP of Semiconductor IP for MOSAID, where he successfully tripled the business within a year and divested it to Synopsys; President of the VSI Alliance, at the time the leading Semiconductor IP standards body;, and General Manager of the IP and Embedded Software divisions of Mentor Graphics. Mr. Kaskowitz also served as VP of Engineering at Cadence Design Systems and Compression Labs, where he was involved in the divesture of the broadcast products division to General Instruments, as well as Director of IP for VLSI Technology, where he was involved in the formation of ARM Ltd. Mr. Kaskowitz holds a B.S. (Hon) in Electrical Engineering from the University of Illinois, Champaign-Urbana.

Infinitedge is a silicon valley-based investment bank focused on the Semiconductor and IT industries. Securities are offered through Arque Capital. For more information on Infinitedge, please visit www.infinitedge.com/


 

 


Tech Tidbits

Tech Tidbits: Emulated MTP Operation using Sidense OTP Macros

Craig Downing, Product Marketing Manager and Jim Lipman, Director of Marketing, Sidense

Many multi-time programmable (MTP) applications that currently use traditional embedded NVM can benefit from using Sidense OTP in an emulated MTP (eMTP) mode in place of more traditional Flash memory or EEPROM. These applications are those that need reprogramming just a few times (sometimes referred to as Few Times Programmable, or FTP) over the lifetime of the product, such as for HDCP encryption keys, firmware, or product IDs that track product update information.

You can use Sidense SiPROM and SLP OTP memory IP for emulated MTP (eMTP) operation as a very reliable, highly secure and more cost-effective alternative to embedded Flash, EEPROM and eFuses. Sidense's 1T-FuseTM single-transistor bit cell enables very high density OTP macros, making the OTP well suited for applications where data will be reprogrammed one or several times over the life of the end product, while minimizing die area and cost compared to alternative NVM solutions.

The simplicity and flexibility of the OTP macro's emulated erase operation lets you implement different re-programmability schemes within the OTP address space. Another advantage of the Sidense eMTP solution is a significant reduction of the traditional NVM erase time and complexity, since the erase procedure can often be replaced by a single bit write operation.

A typical approach for eMTP operation is to reserve additional, un-programmed OTP space for new data and allocate some additional storage for a tag to keep track of which memory segment is currently being used. The information in the tag area is used to calculate the address offset for the data. The amount of uncommitted OTP storage depends on the number of times you want to update the stored information. For example, if you need 4 Kbits of storage that will be rewritten 7 times, you will need a 32 Kbit macro (8 x 4 Kbits), or to rewrite 64 bits up to four thousand times you will need 256Kbits.

SiPROM macrocells have extra space called boot rows where you can store the tag information. Depending on the eMTP architecture you use, the tag information can be automatically read by the macrocell at power-up (boot time) for bank-based replacement, where a whole section of the address space is replaced, resulting in single-cycle random read access. Otherwise, for a word-based replacement (EEPROM emulation), it would be read for every access.

The following figure is an example of a macrocell in which some of the storage is fixed and will not be updated and other portions comprise an initially programmed eMTP block plus unused space for rewriting the eMTP block multiple times.

This figure shows a generic example of a possible OTP memory address space map. The memory tag area (for eMTP tracking) is located in the boot rows of sector 0. The main memory address space is allocated for eMTP data. In this example it is assumed that the eMTP initialization phase includes calculating and storing the eMTP address offset based on the information in the Memory Tracking Area (boot rows). All the memory access is then handled by a memory controller, which translates the external address into the OTP address space.

The next figure is an example of a 512 Byte, eight-times programmable eMTP (8xMTP) implemented with a 4Kx8 (32Kbit) SiPROM macrocell. The eMTP is auto-initialized by the macrocell at power-up (boot) time. The SiPROM memory address space is organized in one bank and 8 sectors. Each sector contains a boot block space of 16 rows. The eMTP tag information is stored in the boot block of sector 0 (rows 0 and 2). The sector size is 4 Kbits (512x8 bits). To reprogram the storage you control the sector address according to the tag information. Since only an 8-bit tag is needed for eight-time programmability, the remaining boot rows in the sectors are available for testing, chip ID, or other OTP applications.

SLP macros do not have boot rows, so tag information is stored in extra OTP space that isn't used for storing data. For either SiPROM or SLP macros, you need very little control logic to control eMTP operation.

Sidense SiPROM and SLP memory macros are well suited for eMTP implementations and by using an n-times larger OTP array, you get an n-times programmable MTP memory as a superior alternative to other types of NVM.

For more details and application notes regarding eMTP operation, please contact Sidense at This e-mail address is being protected from spambots. You need JavaScript enabled to view it .

 


 

Sidense Out and About

Press Releases

Sidense Patents

Sidense was granted two patents in July by the United States Patent and Trademark Office (USPTO):

  • Patent #7,755,162 for an "Anti-Fuse Memory Cell"
  • Patent #7,764,532 for a "High Speed OTP Sensing Scheme"

Visit Sidense at the Upcoming Conferences and Tradeshows


  • GSA Emerging Opportunities Expo and Conference, Booth #602
    Santa Clara, CA (Sept. 16, 2010).
    To schedule a meeting with Sidense at the GSA Expo, please contact Jim Lipman at This e-mail address is being protected from spambots. You need JavaScript enabled to view it , 925-606-1370
  • SMIC Symposium, Booth TBD
    Santa Clara, CA (Oct. 8, 2010).

  • GLOBALFOUNDRIES Technology Conference (GTC), Booth TBD
    Taipei, Hsinchu (Oct. 13, 2010).
    To schedule a meeting with Sidense at GTC, please contact Morse Wang at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

  • ARM European Technology Conference (AETC), Booth TBD
    Paris, France (Oct. 21, 2010).
    To schedule a meeting with Sidense at AETC, please contact Wim van Seters at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

  • Embedded Technology 2010 (ET 2010)
    Pacifico Yokohama, Japan (Dec. 1-3, 2010).
    Sidense will be in the Constellations Booth. To schedule a meeting with Sidense at ET2010, please contact Kazuaki Okawa at This e-mail address is being protected from spambots. You need JavaScript enabled to view it

NVM on the Mind

Other Conferences of Interest

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