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SLP

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Sidense SLP

SLP macros are currently available at 180nm, at densities up to 256 Kbits per macro. These macros were designed for very low power applications, such as handheld wireless, remote sensor and implanted medical devices.

SLP macrocells include several additional features that provide flexibility in customizing the memory operation to target specific applications.

  • Read Mode Options:  By default, the OTP macrocells are read in single-ended mode utilizing one memory cell per logical bit of information. Two additional read modes are provided for enhanced margins and an extra level of data security needed for highly reliable, field-programmable systems: differential mode and redundant mode.
  • Special Operating and Test Modes:  The SLP macrocell has special operating and test modes, such as sense amplifier test mode, word-line test mode and bit-line test mode that can be enabled in order to reliably test the macrocell. Unlike most OTP, testing can be achieved on both the programmed and the un-programmed cells.
  • Mask ROM Option:  SLP macros can be converted into mask-programmable ROMs with a single mask change. The user has the flexibility to mask program the entire memory or individual portions of the macrocell. This feature gives the customer the ability to mask program a section of the memory while allowing other sections of the memory to be programmed in the field.
  • Optional Power Supply Macro:  SLP macros can be combined with an optional power supply macro to allow the customer to program the SLP macrocell in the field after the chip is packaged, eliminating the need for additional power supplies to the chip.

SLP applications include handheld and wireless devices, implanted medical devices, configurable storage, and RFID tags. They are ideal replacements for masked ROM or Flash memory in many applications.

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SLP macros are ideally suited to a wide range of applications including:

  • Automotive PMIC and MCUs
  • Power management/PMICs
  • Analog sensors
  • Timing/Silicon clocks
  • Peripheral controllers
  • PC Camera controllers
  • Microcontrollers

Uses for SLP macros include:

Code Storage

Secure Encryption Keys

Analog Trimming and Calibration

Identification Tags

Chip and Processor Configurability

 

Please click here to request access to application briefs providing examples with area and power consumption.

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Memory bitcell Sidense 1T-Fuse
Density 128 bits to 256Kbits per macro
Process nodes 180nm, generic and HV/Power process options supported 
Power Supply Integrated Power Supply options
Retention > 10 years
Key features
  • High Density
  • Small Area
  • Very Low Power Consumption
  • Multiple Read Modes
  • Support eMTP/Field Programming

 

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DocumentTo Access
SLP Product Brief Click to Download.
Application Briefs Application Briefs (Registration Required)
SLP User Manual NDA REQUIRED.
Datasheets NDA REQUIRED.
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